PicPort®-Pro-CLPicPort®-Pro-CL is a multiple camera frame grabber supporting the Camera Link standard interface. This high-speed board can be used with both line-scan and area-scan Camera Link compatible cameras. It is suitable for both color and monochrome applications, and supports high-speed and high-resolution. PicPort®-Pro-CL is cost effective, compact and high performance, meeting the demanding requirements of diverse image processing and machine vision applications. It is a member of the LV Camera Link Family of products. Besides the standard PCI bus version, the PMC module version of the PicPort®-Pro-CL series is also available. PicPort®-Pro-CL main highlights:
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ArchitectureA comprehensive array of on-board features include Camera Link interface for 2 base or 1 medium/full cameras at up to 85 MHz, large LUTs, Bayer color decoder, multi-taps/packed pixel reformatting, color/monochrome format conversion, up to 48MB 1GB/s frame buffer with advanced features and 32/64-bit, 33/66 MHz PCI bus interface with 16 DMA channels. The frame buffer ensures no data loss under varying operating system conditions by virtue of its memory size and its ability to generate interrupts to the user application that flag dynamic image buffer watermark depth thresholds. The individual features vary for different board configurations, see technical specifications for details.
PicPort®-Pro-CL architecture is user friendly, em-ploying innovative re-programmable flash memory and FPGA (Field Programmable Gate Array) technologies. This allows the user to reconfigure the on-board hardware via downloadable software updates. The flash memory can also be used for security coding to prevent unauthorized copying of user application proprietary technology. Image Acquisition & ConditioningCamera Link InterfacesDepending on board model supports 1 or 2 base (3 ¡Ñ 8-bit or 2 ¡Ñ 8/10/12-bit or 1 ¡Ñ 8/10/12/14/16-bit monochrome or 24-bit RGB) or one medium (4 ¡Ñ 8/10/12-bit monochrome or 30/36-bit RGB) or one full (8 ¡Ñ 8-bit monochrome). Area-scan up to 64K ¡Ñ 64K and line-scan up to 64K ¡Ñ infinity with input frequencies up to 85 MHz. Camera Link control lines for asynchronous reset and exposure control. Camera Link serial ports for camera setup and control. General Purpose input/output InterfacesCamera power, LVDS/TTL and opto-coupler input/outputs are accessible via the PCI backplate 12-pin hirose connector or via two 26-pin header sockets on the PCB top edge. Assemblies consisting of ribbon cable to DB-25 connectors mounted on PCI backplate (these can be disassembled to mount on chassis cut-outs) may also be ordered. Camera power is provided for 2 cameras: +12V factory defaults, while either of the outputs is hardware changeable for +5V. These are available on both hirose and header connectors. Resettable fuses of 1A are provided for both voltages. LVDS and TTL inputs/outputs share physical pins. Selection of direction and standard is via software control. Up to 4 LVDS or TTL pairs are available. Each pair can be selected as 1 LVDS input or 1 LVDS output or 2 TTL inputs or 2 TTL outputs. Each I/O pair is replicated on the hirose connector as well as the header connectors. There are also 2 unique TTL outputs on the header connectors. 8 opto-coupler inputs and 8 outputs are provided on the header connectors. These have built-in resistors to minimize external components. All I/O pins are protected by over/under voltage protection devices clamping to +5V and ground. Application note «External trigger and flash» gives good overview of applications involving external devices such as trigger and flash and about connecting such devices to the frame grabber. LUTs2 LUTs are provided for user configuration as dual 4K ¡Ñ 12 or quad 256 ¡Ñ 8. As the physical memories are organized as 256K ¡Ñ 18, multiple banks are available. Note: only one instead of two LUTs is available for PicPort®-Pro-CL-Mono, resulting in half the LUT size mentioned above for this model. Real-Time Function: Bayer DecoderA Bayer color decoder is available for one camera in some board configurations. This provides high-speed decoding of the Bayer pattern output by many color cameras. Using this on-board facility is an economical and fast solution to this color decoding requirement. Restrictions may appear for multi-tap cameras. Data Storage and TransferFrame BufferA frame buffer (up to 48MB) is provided to buffer and reformat the pixel data grabbed from the camera, before passing it to the PCI bus DMA. A sophisticated controller facilitates combining of camera taps into a raster output to the PCI DMA. Features include:
DMA ControllerOutput data from the Frame Buffer is passed to the DMA controller. This innovative design allows up to 16 DMA channels to be user defined, controlling data burst transfers over the PCI bus. Each DMA channel can also define a Region-Of-Interest within the data stream and can also re-transmit the data to multiple destinations on the PCI bus. In conjunction with the color/monochrome data formatter, various formats of the image data can be transferred to host memory or VGA display memory. Host Bus InterfaceA universal (+5V and +3.3V compatible) PCI bus interface is provided that can operate at 32/64-bit, 33/66MHz. This provides hi-end PCI bus bandwidth at an affordable price. Flash Memory ControllerThe on-board flash memory stores the various configurations of the board that are loaded at power-up and also any software technology security information (software dongle). ConfigurationsPicPort®-Pro-CL exists in following different fix configurations:
Applications
Digital I/O InterfaceGeneral Purpose I/OPicPort®-Pro-CL boards provide various general purpose input/output interfaces. Location and pinout of the connectors is described in section Connector Description. Camera power, LVDS/TTL and opto-coupler input/outputs are accessible via the PCI backplate 12-pin Hirose connector or via two 26-pin header sockets on the PCB top edge. Included in the deliverables package are 2 assemblies consisting of ribbon cable to DB-25 connectors mounted on PCI backplate (these can be disassembled to mount on chassis cut-outs). Camera power is provided for 2 cameras and is +5V or +12V selectable (via on-board jumpers). These are available on both Hirose and header connectors. Resettable fuses are provided for both. LVDS (or RS422) and TTL inputs/outputs share physical pins (GPIO0_P0..GPIO7_N3). First index (before the undersocre) in the signal name refers to the TTL I/O, the second index refers to the LVDS I/O. Selection of direction and standard is via software control. Up to 4 LVDS or TTL pairs are available. Each pair can be selected as 1 LVDS input or 1 LVDS output or 2 TTL inputs or 2 TTL outputs. Each I/O pair is replicated on the Hirose connector as well as on the header connectors. There are also 2 unique TTL outputs on the header connectors. 8 optocoupler inputs and 8 outputs are provided on the header connectors. These have built-in resistors to minimize external components. The 8 opto inputs are grouped into 4 pairs (01/23/45/67), each pair having a common Anode (+) and 2 Cathode (-) pins. The 8 opto outputs are grouped into 2 banks (0..3/4..7), each with 4 outputs. The Collector pins (OptoCx) of one bank do have pull-up resistors to a common rail TAP24V_03/47 which must be connected to the desired operation voltage (+5..24V). The Emitter pins (OptoEx) are normally connected to the ground terminal of the external voltage source. More details about the optocoupler interface are provided in the section below. All I/O pins are protected by over/under voltage protection devices clamping to +5V and ground. Optocoupler InterfaceFor use in industrial environment, PicPort®-Pro boards provide I/O signals isolated by use of optocouplers with variable 5V to 24V interface. To take full profit of this signal isolation, you have to connect the optocoupler to an external power supply. The optocoupler input is prepared for input signals from 5 V to 24 V with the appropriate onboard serial resistors. The optooupler output is prepared for external voltage from 5 V to 24 V.
See also the following examples of optocoupler output. In industrial environment, signal levels of 24 V are usually needed.
Application note «External trigger and flash» gives good overview of applications involving external devices such as trigger and flash. SoftwareDriver SoftwareLeutron Vision Software Development Suite, LV-SDS, is a software development package (Windows, Linux, VxWorks) that allows full control of all PicPort® and PicProdigy® products. The suite consists of Daisy - the basic software interface for PicPort®/PicProdigy® cards, Camera Editor - easy interactive setup of standard and non-standard cameras, DRAL - a library for handling specific time-critical tasks, Orchid - high level library (DLL or OCX) for quick and easy design of PicPort®/PicProdigy® applications, TWAIN Driver and Video for Windows - provide a simple interface between Leutron Vision hardware and other office and image manipulation programs (e.g. MS Office, CorelDRAW, etc.). The software products come complete with a set of demo programs and additional examples with source code as a guide to the programmer in developing particular applications. To obtain more comprehensive information please download the LV-SDS manual. Third Party SoftwareSeveral well-known third party packages for real-time image processing and analysis are also supported. The packages include HALCON, Activ Vision Tools, NeuroCheck, and others. Please refer to our detailed software brochure (PDF) for more details. Connector Description, Wiring SchemesConnector positionsThis chapter provides description of the connectors, jumpers and DIP switches of PicPort®-Pro-CL. The following image show locations and pin #1 positions of all the connectors described below.
Camera connectorsStandard CameraLink connectors for base/medium/full configuration (model specific, see Technical specifications). The PicPort®-Pro-CL-Mono board possesses just a single (P2) CameraLink connector, the other models possess both (P1 and P2) connectors. Please refer to official CameraLink specification to get the connector pinout. Basic I/O connectorHirose 12-pin female connector with camera power output and general purpose I/O signals; the connector is accessible from the backplate of the board.
Universal I/O connectorsTwo male header connectors (P4 and P6, both 13¡Ñ2 pin rows) with camera power output, opto-coupler interface, and general purpose I/O; the connectors are not directly accessible from the backplate of the board. Note: The two pin header connectors may be connected via flat cable to different D-sub connectors. The following tables show also the relevant pins on those D- sub (25, 15 or 9 pin) connectors. Flat cable connected to one of the header pin rows must be aligned to pin 1! Connector P4
Connector P6
Power Selector JumpersTwo 3-pin male headers (S1 and S2) allowing to select the power output voltage that should be delivered to cameras through the I/O connectors (see Basic I/O and Universal I/O connector descriptions above). The table below shows how to select between the +5V and +12V voltages for both available camera power outputs. The options for both outputs may be freely mixed, each may provide different voltage output.
Note: The power selector jumpers are not available on board revision #1. Those boards provide fixed +12V camera power for both outputs (V_CAM0 and V_CAM1). Control DIP SwitchesThe board possesses a DIP-switch device holding two switches (U26 on the figure above). Function description of the switches is described below. The pin marked as rectangle instead of an ellipse corresponds with OFF position of DIP-switch #1.
PCI Gold Bank Protection (DIP Switch 0) PCI Gold Banks should normally never be changed by the user. The prime function of the PCI Gold Banks is to guarantee a recovery mechanism after a Flash Bank programming cycle for an onboard FPGA has failed due to a system crash or power failure. In these cases the Flash Bank programming cycle can not be repeated without rebooting the system. However, since one or more Flash Banks may now contain corrupted FPGA configuration data it must ensured that these banks are not used for FPGA configuration after the next system reboot. For this purpose DIP switch 0 of the Flash Controller (GoldBootSel) must be set to the 'ON' position. In GoldBoot mode the Flash Controller configures the PCI-FPGA from the Gold PCI Bank but leaves the Video-FPGA and CLP-FPGA idle. The Flash programming cycle can now be repeated. After the Flash programming has been completed successfully the GoldBootSel can be reset and the system must be power-cycled (not soft-reset) before the Flash Bank update takes effect. Power Intput ConnectorStandard PC power supply connector (5/12V), male, on the top side of the board (connector P8). The connector should be connected to power supply (use power supply cable of your PC) if the total current used by the cameras is more than 1A; in such case, delivering the power over PCI bus is not possible. Technical Specifications
Complementary and Related ProductsSupporting softwareComprehensive set of software tools consisting of video capture libraries and image processing libraries for Windows XP/2000/NT4, Windows Me/98/95 and for Linux. Please check especially the following ones:
Suitable CamerasPlease check the list of suitable cameras (CameraLink models) for use with PicPort®-Pro-CL. The link invokes page showing wide list of different suitable cameras, allowing you to specify more criterions and restrict the list only to the cameras exactly matching your needs. Correspondent cablesAll the necessary cables for connecting a camera to the framegrabber are available. Related Frame Grabbers
LVmPC®LVmPC® is an ultra compact, mobile image processing system for industrial and machine vision, based on standard PC technology and Leutron's frame grabber series. LVmPC® is available in a huge variety of different configurations. Ordering Information
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